I²C bus (Inter-Integrated Circuit) is a bidirectional, half duplex, two-wire, synchoronous bus, originally designed for interconnection over short distances within a piece of equipment. The I2C bus uses two lines called Serial Clock Line (SCL) and Serial Data Lines (SDA). Both lines are pulled high via a resistor (Rpu) as shown in Figure below. The bus is defined by Philips, see more details.
Three speed modes are specified: Standard; 100kbps [Bits per Second], Fast mode; 400kbps, High speed mode 3.4Mbps. I2C, due to its two-wire nature (one clock, one data) can only communicate half-duplex. The maximum bus capacitance is 400pF, which sets the maximum number of devices on the bus and the maximum line length.
The interface uses 8 bit long bytes, MSB (Most Significant Bit) first, with each device having a unique address. Any device may be a Transmitter or Receiver, and a Master or Slave. The Slave is any device addressed by the Master. A system may have more than one Master, although only one may me active at any time.
Data and clock are sent from the Master: valid while the clock line is high. The link may have multiple Masters and Slaves on the bus, but only one Master may be active at any one time. Slaves may receive or transmit data to the master.
This is an example how to interface I²C with 8051. I use SDCC as C Compiler. My schematic is shown below. I set P2.6 as SCL and P2.7 as SDA.
I²C-Bus Specification [pdf]
Source Code (For SDCC)
- i2c.h
Note: see DS1307 and 24LC512 for applications
Related Links
- Philips I²C Bus
- I2C (Inter-Integrated Circuit) Bus Technical Overview and Frequently Asked Questions (FAQ)
- I²C Bus and Access Bus
- http://www.i2c-bus.org/
Three speed modes are specified: Standard; 100kbps [Bits per Second], Fast mode; 400kbps, High speed mode 3.4Mbps. I2C, due to its two-wire nature (one clock, one data) can only communicate half-duplex. The maximum bus capacitance is 400pF, which sets the maximum number of devices on the bus and the maximum line length.
The interface uses 8 bit long bytes, MSB (Most Significant Bit) first, with each device having a unique address. Any device may be a Transmitter or Receiver, and a Master or Slave. The Slave is any device addressed by the Master. A system may have more than one Master, although only one may me active at any time.
Data and clock are sent from the Master: valid while the clock line is high. The link may have multiple Masters and Slaves on the bus, but only one Master may be active at any one time. Slaves may receive or transmit data to the master.
This is an example how to interface I²C with 8051. I use SDCC as C Compiler. My schematic is shown below. I set P2.6 as SCL and P2.7 as SDA.
Schematic: I²C Bus
Datasheet I²C-Bus Specification [pdf]
Source Code (For SDCC)
- i2c.h
Note: see DS1307 and 24LC512 for applications
Related Links
- Philips I²C Bus
- I2C (Inter-Integrated Circuit) Bus Technical Overview and Frequently Asked Questions (FAQ)
- I²C Bus and Access Bus
- http://www.i2c-bus.org/
Chủ Nhật, 9 tháng 10, 2011
09:12
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